The present technology relates to a lead frame to which a chip such as a semiconductor chip is mounted and to a semiconductor device including the lead frame.
In recent years, for addressing miniaturization and higher density of electronic units, miniaturization of a package in which a chip such as a semiconductor chip is sealed with a resin has proceeded. Examples of forms of the foregoing package include a package using a lead frame. Examples of small-sized packages using the lead frame include a QFN (quad flat non-leaded package) and an SON (small outline non-leaded package). What we call a non-leaded package has attracted attentions.
In the package-type semiconductor device, a semiconductor chip is arranged in a chip-mounting region in the central portion of the lead frame, an electrode pad of the semiconductor chip is connected to an external terminal around the chip-mounting region, and a signal is thereby transmitted (for example, Japanese Unexamined Patent Application Publication Nos. 2009-278117 and 2006-222471). Further, by grounding (GND) the semiconductor chip, electric characteristics are stabilized.